1. Field
Aspects of the present disclosure relate to semiconductor devices, and more particularly to capacitor structures in field effect transistor (FET) structures using fin (FinFET) channels.
2. Background
FinFET structures have reduced the chip area of transistors in integrated circuits. The FinFET structure uses additional layers to connect to the source/drain contacts, and the gate contacts, of the FinFET devices. Spaces between the FinFET devices in an integrated circuit have also decreased. These spaces are often unused to allow for isolation between devices. Other structures, such as capacitors, still have large chip areas, which makes scaling of the entire integrated circuit more difficult. Capacitors are often made in the metal interconnection layers, and often fabricated in the layers above the “metal one” (M1) layer in circuits. These structures reduce some of the advantages of reduced size transistors in FinFET structures and devices.